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IBM Praktikum/Internship: Processor Verification (m,w,x) in Böblingen, Germany


At IBM, work is more than a job - it's a calling: To build. To design. To code. To consult. To think along with clients and sell. To make markets. To invent. To collaborate. Not just to do something better, but to attempt things you've never thought possible. Are you ready to lead in this new era of technology and solve some of the world's most challenging problems? If so, lets talk.

Your Role and Responsibilities

If you are interested in processor verification, computer architecture, hardware development, test-case generation or FPGA prototyping - this is the place to be!

We can offer a variety of four different topics. Please specify in your application which topic you prefer because we would like to plan your internship according to your skills and interests. Telling us the planned duration and start date of the internship would be helpful too.

You can be part of this international team in 2022:

The hardware team in Boeblingen develops the most powerful server systems in the world - in an international work environment with our partner

labs in the USA, Israel and India. We are using modern verification methods based on AI and are continuously optimizing our development processes.

Agile methods and design thinking are daily tasks in our projects.

To improve our verification we are continuously exploring new methodologies and improving our environments. You can be part of the team and

contribute with an internship. The internship should take place in 2022 - more details can be discussed.

We have several topics to choose from - depending on your skill and preferences.

Topic 1: Trek5 Prototype Development

IBM's high end microprocessors have a very high focus on Reliability, Availability and Servicability (RAS) as well as security features to prevent unwanted accesses or modifications to the data within the processor. These features consist of complex but special sequences. Therefore, a method based on a graphs provides the stimulus to the verification today rather than random data. A new standard has been established in the industry called Portable Stimulus (PSS). A protoype should be developed that uses PSS and integrates it with today's verification environments in C++ in order to generate testcases for the service logic in our high end processors.

Topic 2: Python based coverage framework

To develop complex microprocessors, multiple hierarchies of the design are being simulated in order to ensure a first-time-right design when the first chips are being produced. Given that the size of the state space is much bigger than the number of atoms existing in the universe, functional coverage is being used to measure quality. A good understanding of what is covered on which simulation level is key and requires close collaboration between logic design and verification. Using and enabling a Python based framework including open source framework can enable that. A prototype should be developed that can be used to measure the quality of test driven development to ensure the initial quality of a new design feature. If you are interested to work very close to the micro-architecure and the functionality of a design, developing great user experiences for hardware development - this is the place to be!

Topic 3: RISC-V verification

One of the useful techniques for pre-silicon and post-silicon verification is test case generators, which we develop in order to verify complex processor architectures. For on-target test generation, the usage of acceleration and FPGA-based emulation platforms, as well as the silicon samples, require partial reference modeling to test the instruction streams we generate, predict and compare their results, and have better checking (bug detection) capability.

In addition, a model and a technique to collect architectural coverage data need to be developed to make sure we cover the interesting instruction streams, and thus have a higher level of confidence in our tool and stimuli it generates.

The internship will use a system architecture based on RISC-V processors under development.

If you are interested in Computer architecture, developing test-case generators and developing algorithms for microprocessors - this is the place to be!

Topic 4: Python-based runtime control for FPGA prototyping.

The development of IBM's high-end mainframe servers with their complex I/O architecture requires comprehensive emulation to ensure correct interaction of the various firmware and hardware levels. For this task, we use an FPGA-based prototyping platform. A python API is available for the integration of the emulation platform's run-time control and debug features into the IBM workflow. If you are interested in validation of complex firmware/hardware interaction via high-end FPGA-based prototyping and in developing Python and/or C++ code for workflow control and big data analysis - this is the place to be!

If you are self-driven and enjoy a flexible and agile work environment, then hardware verification is your place to work. If you're interested please get

in contact with us and include in your response all relevant documents (preferably all in one single pdf file):

1) Cover Letter incl. your availability (earliest start and latest end date)

2) CV incl. your level of German

3) university enrollment document to prove that you are still studying

4) current transcript of records and other relevant certificates / references

5.1) Non-EU citizen studying in Germany: copy of passport, residence and work permit

5.2) Non-EU citizen studying elsewhere: prove of identity incl. place of birth

Thank you.

Required Technical and Professional Expertise

1) Object-oriented programming in C++ and/or Python

2) Base knowledge of software development tools & techniques

3) Good background of computer/-microprocessor architecture

4) Good problem solving skills

5) Good team player and open minded to work in international teams

6) Strong communication skills in English/German

Preferred Technical and Professional Expertise

1) Hardware development (using VHDL and/or Verilog)

2) Collaborative development with Git/GitHub

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Location StatementFor additional information about location requirements, please discuss with the recruiter following submission of your application.

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